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Altera_Forum
Honored Contributor
15 years agoOne way would be to use a PLL to produce a 25 MHz clock from the 50 MHz clock. Check the megafunctions.
Another good way would be to use a clock enable. reg clk_enable; always @ (posedge clk) clk_enable <= ! clk_enable; ^^ enable is "1" just for every other clock Then you wrap arround every piece of code you need to run at 25 MHz like this always @ (posedge clk) begin if (clk_enable) begin // Your code goes here end end