Div1
New Contributor
3 months agoHow to connect different buses in quartus block schematics?
Hi,
I am new to altera, I have one TestBUSA[17..0] and a block which takes 20bit input Test_data[19..0], is there a way to assign this TestBUSA[17..10] to Test_data[15..8] and remaining inputs of Test_data to GND. I don't know how to do this, in xilinx it could be simply acheived by writing net name as L,L,L,L,TestBUSA[15..8],L,L,L,L,L,L,L,L. Is there something similar in altera.