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Honored Contributor

16 years ago

How to check signal waveform.

I have this VHDL code within my architecture: architecture first of butterfly8 is signal butterfly8_r_Z1, butterfly8_r_Z2, butterfly8_r_Z3, butterfly8_r_Z4: std_logic_vector(31 downto 0); ...

Altera_Forum

Honored Contributor

16 years ago

I have removed the pin assignments in PIN PLANNER. However, still having the same problem after compiled. Please find below picture:

http://i28.tinypic.com/yialu.jpg

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How to check signal waveform.

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