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Altera_Forum
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16 years ago

How to check signal waveform.

I have this VHDL code within my architecture: architecture first of butterfly8 is signal butterfly8_r_Z1, butterfly8_r_Z2, butterfly8_r_Z3, butterfly8_r_Z4: std_logic_vector(31 downto 0); ...
Altera_Forum's avatar
Altera_Forum
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16 years ago

Thank you so much all! Since I just want to perform simulation (for smaller sets), I will use the virtual pins to perform simulation.

However, for the high-level, I will use the method suggested by KAZ where only 16-bit for real and 16-bit for imag are use. And the 128 inputs take turns to input to the device.

But, why even I have assigned all the I/O pins as virtual pins, the message of 'can't place pins due to device constraints' still pop up? Any suggestions? I have checked with the Pin Planner and all the I/O pins gone. So, I am quite sure I have assigned the virtual pins properly.