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Altera_Forum's avatar
Altera_Forum
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16 years ago

How to check signal waveform.

I have this VHDL code within my architecture: architecture first of butterfly8 is signal butterfly8_r_Z1, butterfly8_r_Z2, butterfly8_r_Z3, butterfly8_r_Z4: std_logic_vector(31 downto 0); ...
Altera_Forum's avatar
Altera_Forum
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16 years ago

Thanks. Yes, I splits the FFT up into smaller sets (the butterfly computation). And each of these smaller sets, I write a VHDL code and treat it as a component and call it in my high-level design. What if I am writing a low-level VHDL code (which I will use it as a component of my FFT) and it has many I/P ports, and I would like to perform a small simulation? Should I also use the way you mentioned?

One more last question: If say I am using 128-point FFT. Is it the 128 real and imaginary inputs will take turn to input to the device using 16 bits real and 16 bits imag input pins?