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GPK,
Brilliant! If I pass the parameter +notimingchecks in the vsim command line, the timing checks are disabled.
Nice work, Thank you very much.
C.
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;);) maaaan you are a walking joke ;). why the hell are you simulating in a timing simulation model if you didnt need timing delay information. by this command you basically disabled all the timing analysis and now it became a functional simulation. if you are ok with just functional simulation, compile your project's verilog file itself. and simulate it. without using .sdf(sdo) and without .vo files and it won't simulate any timing,it will be just a functional simulation and you will not have to enter this +notimingchecks command at all. (by the way if you enter into simulation optimization options there is a checkbox for that, named "disable timing checks (+notimingchecks)" . check it and start the simulation.)
does anyone know how to disable Red X -es With the timing simulation? (without using +notimingchecks). allright i get it, there is a violation but i do not care. i want to see my signal.
Honored Contributor
