How to assign GPIO to pins I have assigned on DEO nano

Here's a DE0-nano template design. It doesn't do much other than blink the LEDs, however, it has all the constraints information you require.

Unzip the design and read the readme.txt. Then look at the scripts synth.tcl and constraints.tcl.

Cheers,

Dave

I don't known about the OP, but this works for me, thank you.

There are five warnings, four of which I understand. The fifth is# 169177, a warning about meeting Altera interface voltage requirements (https://www.alteraforum.com/forum/showthread.php?t=42490).

Is there a way to get rid of this warning?

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Generally no. As you project goes you'll get thousands of warnings, usually difficult to control, except if you use the supress function.

Which warning is it? Is it the one talking about the requirements for 2.5/3.0/3.3V banks? If yes it just means you need to be careful about voltage overshoot, as there is a close limit on what the FPGA can tolerate. (4.1V IIRC)

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Is it the one talking about the requirements for 2.5/3.0/3.3V banks?

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Yes, that's the one. It's unfortunate there's a warning for which the only option is to suppress it. In this case, most of those signals are already wired up on the DE0-Nano to other components (e.g. SDRAM, buttons, LEDs, etc.) so I assume TerasIC adhered to an 447 (http://www.altera.com/literature/an/an447.pdf) when they designed this board.

Of course, much of Altera's library code has plenty of warnings so warning-free code is practically unattainable. Still, I don't want something important to get lost in a sea of innocuous warnings so I'll suppress this one.