how set minimu delay (constraint) with TIMEQUEST

You have conflicting assignments. Your clock requirement is 1ns(1GHz), which means the path between registers has to be less than 1ns. You then add a min requirement that says it has to be greater than 5ns and 10ns. Quartus II probably doesn't know what to do. I changed the clock to:

create_clock -name Din -period 20.000 [get_ports {Din}]

(I removed the -waveform, as the default is a 50/50 duty cycle, and I've seen users forget to change it when they change the period, which naturally is incorrect...)

Now we have a default setup requirement of 20ns, a default hold requirement of 0ns, and on the two paths you overrode the default hold requirement with 5ns and 10ns. (Looking closer, you still have a problem in that you've constrained the same path twice, once at 5ns and once at 10ns. The second one takes affect...)

Anyway, making that clock constraint and looking at the hold timing on that path, a 10ns route has been added by Quartus to meet hold timing.

Why are you adding delays to internal paths? This is generally not recommended...