How OpenCL handles multiple accelerators on FPGA

Oh, I see. If you have multiple kernels inside the same ".cl" file, they will be synthesized as one FPGA bitstream and you can use them in parallel by creating multiple queues in the host and invoking each kernel from a different queue. But, if you have two different ".cl" files which are synthesized separately into different bitstreams, then you cannot use them in parallel since only one bitstream can be active on the FPGA at a time. You can, however, switch back and forth between multiple bitstreams in the same host code and the OpenCL runtime will automatically reconfigure the FPGA with the correct bitstream as long as the bitstream has been correctly loaded by the host code and each kernel is correctly associated with its respective bitstream.