How does one verify the SDC constraints?

After some bad experiences with temperature dependent timing bugs we started to do full temperature cycle test over a limited (not full) industrial temperature range for each firmware release. When it fails you know you probably have a bug in the SDC constraints. Unfortunately when it passes you only know that this specific firmware build works on this specific board. We have not yet reached a confidence level in our SDC files that we can skip the temperature tests once a release passes. We had a case where small internal changes on a previously successfully tested design passed the STA but failed the temperature test. Temperature testing each release is expensive but still magnitudes cheaper than discovering it in the field.