Forum Discussion
Altera_Forum
Honored Contributor
14 years agoThank you. That did the first job for me.
But have a followup question I have a table of I/O pins and the signals they are suppose to internally connect to. Is there a way to import this entire list (preferably in the .bdf file)? or do I need to add attributes to each verilog/VHDL signal identifying its pin location?