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Possibly the easiest approach would be to add a dual-port FIFO within your Qsys system and to export the write-side Avalon-MM Slave port so that the wires appear in your Qsys top level module. Then, hook your external logic to those wires to push the data into the Qsys FIFO. You can also do things like add PIO components to control your external logic, if needed.
Alternatively, wrap your existing logic into a Qsys custom component and add an Avalon-MM Slave port to provide access to your existing FIFO, or possibly control/status registers for your custom logic.
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Hi ted:
Thanks for you reply!
I have another question need you help. It seems the first way is easy for me currently. connect the dual-port fifo read-side to dma? do i need to prepare any fifo-reading logic or the dma can read data from fifo automatically?
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