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sli30's avatar
sli30
Icon for New Contributor rankNew Contributor
7 years ago

How can I see the place&route on FPGA for OpenCL file?

Dear all, Typically for RTL code, we can use chip planner in Quartus to see the resource place&route. My question is now I'm using commend aoc to generate the *.aocx file (aoc *.cl -o *.aocx). It wi...
HRZ's avatar
HRZ
Icon for Frequent Contributor rankFrequent Contributor
7 years ago

Unfortunately there is no way to "import" a placed-and-routed OpenCL design in Quartus while preserving the post-place-and-route information (or at least I couldn't find any). You will have to open the project generated by the OpenCL compiler (which can be used right after the first stage of OpenCL compilation, i.e. -c switch, is finished) and place and route it with Quartus manually to get such information. I tried it once with Stratix V and it worked. I am not sure about Arria 10, though, since, as MUsman said, that one uses Partial Reconfiguration.