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Altera_Forum's avatar
Altera_Forum
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10 years ago

How can I connect multiple logic wires to module outputs?

I have a System Verilog syntax related question. In my Quartus II project (for Cyclone IV) I need to have two modules control the SRAM ports (SRAM_DQ, SRAM_OE_N, SRAM_WE_N, etc.). These two modules (...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Quartus has told you exactly what is wrong... "pins can't be assigned to more than one value".

Say the Nios SoC wants to access the SRAM and tries to drive one of the pins, say, low. But at the same time the VGA controller wants to access the SRAM and drive the same pin high. What value should the pin be?

You need some form of Arbitration logic to decide who has access to the memory and when.