Forum Discussion
OLevy1
Occasional Contributor
Occasional Contributorhi, i would like to implement a PCIe to PCIe bridge (ArriaV GX) between 2 Hosts (both Root Complex).
i am thinking of using 2 PCIe Cores, each will contain the same characteristics (device id, BARs...) of one of the HOSTs. basically the goal is to transfer the TLPs between one Host to another. i wou...
Abe
Frequent Contributor
Frequent ContributorWhen you restart the processor are you passing the same reset signal to the EP as well? If you do not reset the EP when the processor is being reset, the EP will not enumerate correctly.
To change the PCIe IP on the processor from EP to RC, you have to find out the following:
- The current connection between processor and EP - Is this connection via the processors BUS interface or via PCIe or another specific interface?
- Will the processor support interfacing to a PCIe RC, ie, does the design support it.
- Is the processor and EP sitting in an FPGA?
You can take a look at the PCIe reference designs here:
