help!!

I'm actually trying to do a matrix multiplication. But currently doing step by step and am stucked.

what if i want at S6 to have the multiplication of R1_NEXT AND R2_NEXT. This value is store in another register called R13_NEXT.

the value of R13_next does not show in my waveform. It is undefined.

when S6=> if load='1' then

r13_next<=(r1_next)*(r2_next);

state_next<=S0;

else

state_next<=S6;

END IF;

My test bench code:

LIBRARY ieee;

USE ieee.std_logic_1164.ALL;

-- Uncomment the following library declaration if using

-- arithmetic functions with Signed or Unsigned values

--USE ieee.numeric_std.ALL;

ENTITY Project3M2A_TBW IS

END Project3M2A_TBW;

ARCHITECTURE behavior OF Project3M2A_TBW IS

-- Component Declaration for the Unit Under Test (UUT)

COMPONENT Project3M2A

PORT(

A : IN std_logic_vector(7 downto 0);

B : IN std_logic_vector(7 downto 0);

W : OUT std_logic_vector(7 downto 0);

X : OUT std_logic_vector(7 downto 0);

Y : OUT std_logic_vector(7 downto 0);

Z : OUT std_logic_vector(7 downto 0);

LOAD : IN std_logic;

COMPLETE: OUT std_logic;

RST : IN std_logic;

CLK : IN std_logic

);

END COMPONENT;

--Inputs

signal A : std_logic_vector(7 downto 0) := (others => '0');

signal B : std_logic_vector(7 downto 0) := (others => '0');

signal LOAD : std_logic := '0';

signal RST : std_logic := '0';

signal CLK : std_logic := '0';

--Outputs

signal W : std_logic_vector(7 downto 0);

signal X : std_logic_vector(7 downto 0);

signal Y : std_logic_vector(7 downto 0);

signal Z : std_logic_vector(7 downto 0);

signal COMPLETE: std_logic :='0';

-- Clock period definitions

constant CLK_period : time := 40 ns;

BEGIN

-- Instantiate the Unit Under Test (UUT)

uut: Project3M2A PORT MAP (

A => A,

B => B,

W => W,

X => X,

Y => Y,

Z => Z,

LOAD => LOAD,

RST => RST,

CLK => CLK

);

A<="00000001";

B<="00000010";

load<=not load after 40ns;

-- Clock process definitions

CLK_process :process

begin

CLK <= '0';

wait for CLK_period/2;

CLK <= '1';

wait for CLK_period/2;

end process;

-- Stimulus process

stim_proc: process

begin

rst<='0';

wait for 60ns;

rst<='1';

wait for 100ns;

wait;

end process;

END;