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Altera_Forum
Honored Contributor
8 years agohelp with TOP I/O management
Hello,<br> <br> I am student who recently got my hands on DE10-nano. Up until now I was always working with Artix-7, Xilinx board. What I am trying to do is to migrate some of my projects to Int...
Altera_Forum
Honored Contributor
8 years agoAfter synthesizing your design, use the Pin Planner from the Tools menu to assign top-level signals to pins. You can drag and drop onto the picture of the device package or double-click location cells in the All Pins list at the bottom to select a location.