Help with errors in what should be a simple counter.

I'm trying to make a simple counter that basically counts up from 0x00 to 0x10 and I am getting the errors

Warning (10492): VHDL Process Statement warning at AngleCounter.vhd(17): signal "AngleCode" is read inside the Process Statement but isn't in the Process Statement's sensitivity list

Error (10818): Can't infer register for "anglecodeunsign[0]" at AngleCounter.vhd(19) because it does not hold its value outside the clock edge

Error (10822): HDL error at AngleCounter.vhd(22): couldn't implement registers for assignments on this clock edge

The code is as follows:

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity AngleCounter is
port(resetn,clock,enable,sresetn: in std_logic;
AngleCode: buffer std_logic_vector(7 downto 0);
Angle: buffer std_logic_vector(7 downto 0));

end entity AngleCounter;

architecture behavior of AngleCounter is
signal anglecodeunsign: unsigned(7 downto 0);
begin
process(resetn,clock,enable,sresetn)
begin
anglecodeunsign <= unsigned(AngleCode);
if(enable = '1') then
if(resetn = '0') then
anglecodeunsign <= "00000000";

elsif rising_edge(clock) then
if(sresetn = '0') then
anglecodeunsign <= "00000000";
elsif (sresetn = '1') then anglecodeunsign <= anglecodeunsign +"00000001";
if(anglecodeunsign > "00010000") then
anglecodeunsign <= "00000000";
end if;
end if;
end if;
end if;
end process;
AngleCode <= std_logic_vector(anglecodeunsign);

with AngleCode select
Angle <= "10010000" when "00000000", --0
"10000110" when "00000001",--1
"10000010" when "00000010",--2
"01111001" when "00000011",--3
"01110101" when "00000100",--4
"01110001" when "00000101",--5
"01100111" when "00000110",--6
"01100100" when "00000111",--7
"01100000" when "00001000",--8
"01010101" when "00001001",--9
"01010001" when "00001010",--A
"01000110" when "00001011",--B
"01000001" when "00001100",--C
"00110101" when "00001101",--D
"00101000" when "00001110",--E
"00100000" when "00001111",--F
"00000000" when "00010000",--10
"00000000" when others;
end architecture behavior;

If anyone could help me solve this I would be very grateful.