Dave,
Thank you for taking a few minutes to explain how to me some of the "big picture" I'm missing here. It took me some time to finally get all of my assignments to have the correct sizes and types, but:
LIBRARY ieee;USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
USE ieee.math_real.all;
---------------------------------------------------------------------
ENTITY xcorr is
GENERIC
(
-- length of the known signal
lenKnown: NATURAL := 4;
-- bit depth of a sample
bitDepth: NATURAL := 12
);
PORT
(
rcvPt: IN STD_LOGIC_VECTOR(bitDepth-1 DOWNTO 0);
clk: IN STD_LOGIC;
corrPt: OUT STD_LOGIC_VECTOR(NATURAL(CEIL(LOG2(REAL(lenKnown) * (2.0**(REAL(bitDepth)**2.0))-1.0))) DOWNTO 0)
);
END ENTITY;
---------------------------------------------------------------------
ARCHITECTURE circuit OF xcorr IS
TYPE sampData IS ARRAY (NATURAL RANGE <>) OF SIGNED(bitDepth-1 DOWNTO 0);
TYPE multData IS ARRAY (NATURAL RANGE <>) OF SIGNED((bitDepth**2)-1 DOWNTO 0);
CONSTANT sigKnown: sampData(0 TO lenKnown-1) := ((0 => '1', OTHERS => '0'),(0 => '1', OTHERS => '0'),(0 => '1', OTHERS => '0'),(0 => '1', OTHERS => '0'));
BEGIN
compute_output: PROCESS (clk)
VARIABLE sigRec: sampData(0 TO lenKnown-1) := (OTHERS => (OTHERS => '0'));
VARIABLE sigMult: multData(0 TO lenKnown-1) := (OTHERS => (OTHERS => '0'));
VARIABLE sum: SIGNED(NATURAL(CEIL(LOG2(REAL(lenKnown) * (2.0**(REAL(bitDepth)**2.0))-1.0))) DOWNTO 0);
BEGIN
IF clk'EVENT AND clk = '1' THEN
sum := (OTHERS => '0');
FOR i IN lenKnown-1 DOWNTO 1 LOOP
sigRec(i) := sigRec(i-1);
END LOOP;
sigRec(0) := SIGNED(rcvPt);
FOR i IN 0 TO lenKnown-1 LOOP
sigMult(i) := RESIZE((sigRec(i) * sigKnown(i)), (bitDepth**2));
sum := sum + sigMult(i);
END LOOP;
ELSE
NULL;
END IF;
corrPt <= STD_LOGIC_VECTOR(sum);
END PROCESS;
END ARCHITECTURE;
and in the tiny bit of testing I've done so far it works and it works fast (~8ns delay)! I guess this approach seems more like a detector to me than the mathematical idea of a cross correlation, but I think I'm starting to think in discrete time.