You need to draw yourself a timing diagram. What you have written is analogous to C-code where you have all the samples in a vector.
In hardware, you're more likely to have two new samples valid on every clock. To start with, you would zero out an accumulator, and on every subsequent clock, multiply the two new samples together and then add the product to a running sum. That running sum would be accumulated for a user defined period (your vector length), and then that "correlation" estimate would be output. The accumulator would be zeroed, and the process repeated.
Your approach assumes that the timing of the two signals is known and identical, i.e., that both signals show up at the same time. If there is uncertainty in the relative timing of signals, then you will need to perform this calculation at multiple delays, or "lags". If you calculate the cross-correlation at multiple lags, you can Fourier transform the lags into a cross-power spectrum. The phase-slope of that spectrum is the relative delay of the correlated signal in the two inputs.
Cheers,
Dave