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Altera_Forum
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17 years ago

help needed: passing toggle signals cross clock domain

Hi all...I have a process running at clock A (2.667MHz) which will generate a toggle signal X and I need this signal to pass to clock domain B (80MHz) which a FSM is updating its state according to t...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Hi,

The whole idea here is to absorb the metastability itself. Thats what tsetup or TH violation is all about. The recommended number of stages is two minimum(look how dual clk fifos are designed internally).

I have never heard of one stage.

The issue of multibits and tackling it with grey coding doesn't make sense to me. Can you please explain that?

Regards

Kaz