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Honored Contributor
Honored ContributorHelp needed in VHDl code for calculating the I and Q phase component for a ADC signal
Hello all, I am designing a DDC in which I need to calculate the In phase(I) and the Quadrature phase(Q) components of my ADC signal. I know how these components are manually calculated from som...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- before decimation(after adc, at mixer) what is your clock speed and what is sampling rate --- Quote End --- sampling rate= 2.5 GHz and Clock speed= 1024 clock cycles/sec
