Help Moore | Moove

Are you asking about the basics of how to write a state machine in an HDL (like Verilog or VHDL)? Or do you not understand the diagram? For the former, Google is your friend. For the latter, each state is represented by 3 bits (S1 is 000, for example). The red numbers seem to represent a 2 bit input indicating when to move to the destination state, with * being a wildcard. And the list on the right represents what the output should be in each state. It's not clear how many bits are used to represent the output because there is no indication if those output bits are decimal or possibly hex (most likely decimal but you never know).