Altera_Forum
Honored Contributor
16 years agohelp in timeQuest
hi,
i'm a new user in timequest (and in timing analysis) and i'd like to know how do i constrain the next scenario: an input clock samples a 2 input pins and the registers result is going to 2 output pins. i want to constrain that the max delay between the 2 outputs is X nsec. how do i do that?