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Altera_Forum
Honored Contributor
11 years agoHC-SR04 (ultrasonic sensor) verilog code help
Hi, for my project i have to interface the HC-SR04 (ultrasonic sensor) to my DE2-115 board. I have been struggling with the verilog code for a while. Can anyone please help me out with the code? T...
Altera_Forum
Honored Contributor
11 years agoAs far as I know both multiply and devide are, but devision in one clock cycle needs a big area. It is possible that your FPGA has not enoug space left for that.