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Altera_Forum
Honored Contributor
10 years agoHi, i took help from a vhdl code (i am not familiar with it though). Here's the link to the vhdl code:
https://github.com/xesscorp/xula/blob/master/fpga/xula_lib/hcsr04.vhd I know i'm missing something. I am a verilog beginner. Hope you can help. Here's the code I've written so far: 'timescale 1 us/ 1 us module sensor (trig, dist, clear, led, clk, echo); output trig, dist, clear, led; input clk, echo; reg [3:0] timer; always @ (posedge clk) begin timer <= timer +1; //timer will start soon as positive clock pulse is detected if timer = 10; //It takes 10 us to send pulse from sensor trig = 1; //then,trig is high after 10us else if echo; //when echo is high, dist counting starts, trig goes to low, led turns on begin dist <= dist + 1; //echo pulse width trig <= 0; led = 1; end if dist <= 38; //max echo back time = 38 us without obstacles begin //then everything will be back to intial condition clear =1; dist <= 0; timer <=0; led <= 0; end end assign dist = dist * 340; //multiplying with speed of sound in air endmodule