having problem when Simulating Nios II with Program Memory on External Flash & SSRAM

I was following the tutorial on

http://www.alterawiki.com/wiki/Simulating_Nios_II_Designs_with_Program_Memory_on_External_Flash_and_SSRAM

for Simulating Nios II with Program Memory on External Flash & SSRAM.

Eventually Modelsim shows folloing Error while trying to load the simulation files:

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# ** Note: (vsim-3812) Design is being optimized...# ** Error: (vopt-7) Failed to open info file "work/_info" in read mode.# No such file or directory. (errno = ENOENT)# ** Error: ./..//niosii_system_tb/simulation/niosii_system_tb.v(103): Module 'niosii_system_tb_niosii_system_inst' is not defined.# ** Error: (vopt-7) Failed to open info file "work/_info" in read mode.# No such file or directory. (errno = ENOENT)# ** Error: ./..//niosii_system_tb/simulation/niosii_system_tb.v(121): Module 'niosii_system_tb_niosii_system_inst_led_pio_external_connection_bfm' is not defined.# ** Error: (vopt-7) Failed to open info file "work/_info" in read mode.# No such file or directory. (errno = ENOENT)# ** Error: ./..//niosii_system_tb/simulation/niosii_system_tb.v(125): Module 'niosii_system_tb_niosii_system_inst_button_pio_external_connection_bfm' is not defined.# ** Error: (vopt-7) Failed to open info file "work/_info" in read mode.# No such file or directory. (errno = ENOENT)# ** Error: ./..//niosii_system_tb/simulation/niosii_system_tb.v(150): Module 'niosii_system_tb_flash_ssram_tristate_bridge_bridge_0_tcb_translator' is not defined.# ** Error: (vopt-7) Failed to open info file "work/_info" in read mode.# No such file or directory. (errno = ENOENT)# ** Error: ./..//niosii_system_tb/simulation/niosii_system_tb.v(177): Module 'niosii_system_tb_flash_ssram_tristate_bridge_pinSharer_0_pin_divider' is not defined.# Optimization failed# Error loading design

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and then I tried not to use optimization in IDE for ECLIPSE and then tried again I got verbosity_pkg Error:

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# Top level modules:# altera_tristate_conduit_bridge_translator# Model Technology ModelSim ALTERA vlog 10.1e Compiler 2013.06 Jun 12 2013# -- Compiling module altera_conduit_bfm_0002# ** Fatal: Unexpected signal: 11.# ** Error: C:/Users/Administrator/Desktop/Nios2_External_Memory/niosii_system/testbench/niosii_system_tb/simulation/submodules/verbosity_pkg.sv(48): Verilog Compiler exiting# C:/altera/14.0/modelsim_ase/win32aloem/vlog failed.

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I added this line to my Modelsim TCL but didnt work again:

vlog -sv niosii_system_tb.v -L altera_common_sv_packages

Anyone had the same problem befor?

Thanks in advance.