Half-precision floating point?

I don't think half-precision is supported in the OpenCL compiler yet. Furthermore, since the DSPs in Arria 10 do not natively support half-precision, you will not get any DSP reduction by using half-precision compared to 32-bit float. In fact, doing that will likely increase DSP usage since you can perfom 32-bit FMADD with one DSP, but you will need at least two DSPs to perfom 16-bit FMADD (one for multiplication and one for addition).

What is done in that paper is to "emulate" FP16 compute by using shared exponent 16-bit fixed-point compute which likely requires a lot of manual conversion, shifting, and bit masking. It is not real FP16 compute, but they show that they achieve the same accuracy compared to FP16. That paper is written by Altera's OpenCL team and nobody outside of Altera has access to their source code or knows how they have achieved what they claim.