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@linas: Ah, now I know. Thank you.
@tricky: Yes, this was an easy to learn lesson. Above all for me, I don't have to care about the sensitivity-list anymore ;)
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If you are bothered by having to list all the input signals in a VHDL sensitivity list, you no longer have to do so. VHDL-2008 has a construct that automatically includes all inputs to a process, thus simplifying the sensitivity list. For example:
//Old way
my_old_process: process (A,B,my_reset, my_input)
begin.....
//New way. Just use the keyword "all"
my_better_process: process(all)
begin....
Robert
lead trainer VHDL and Verilog
www.digitaldesignconcepts.org
Honored Contributor
