Forum Discussion
Altera_Forum
Honored Contributor
11 years agoGood design, bad design -> one-clock-states in state-machines
Hi, another question is giong through my mind: Is it possible (good design) to create one or more states which exit to next state without any condition. example:
if (rising_edge(...
Altera_Forum
Honored Contributor
11 years agoAs long as you stick to the templates, theres not a lot that is "unsafe" to use.
Aslong as you have: if rising_edge(clk) then as the first thing in the process, you can do pretty much anything inside it.