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Altera_Forum's avatar
Altera_Forum
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15 years ago

generics in top level vhdl

Hello! I want to create a SOPC component with parameters, so my top level vhdl file must contain the corresponding generics. I have a block diagram with several logic elements and vhdl com...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

might be easier to write VHDL at some point. have you looked at direct instantiation and generate statements? connecting blocks can be done pretty efficiently.