Generic driver to rest of the system communication - advice needed?

Your description is very wordy - no timing diagrams, so I dont really know what you're getting at. Are there any standard interfaces to use rather than this that would allow you to plug it into more mudules (like an Avalon or AXI-4?) read_req/wr_request is pretty standard and straight forward, just like a FIFO. But it seems a bit odd (and inefficient) to have to detect a rising edge on wr_req, you're data rate will be half the clock rate. THis seems to be more suitable for a requesd/acknowledge type interface.