Forum Discussion

KAkyo's avatar
KAkyo
Icon for New Contributor rankNew Contributor
7 years ago

Generation of STP file for SignalTap

Hello, There is a locking issue in my application on FPGA board and I want to debug my application. When doing research, I found SignalTap is used to follow the signals in the application. I played ...
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
7 years ago

As mentioned, the op wants to use pre-synthesis signals. As such, keep is not necessary since just the addition of Signal Tap to the design and tapping the signals will preserve them.

In any case, it's much easier to create a .stp file (File menu -> New or from the Tools menu) and add signals from your design to the file. You have to perform at least Analysis & Elaboration (Processing menu) of your design's source code before you will be able to tap the signals in the .stp file Node List. See this online training (and its follow-ups) for everything you need to know about Signal Tap:

https://www.intel.com/content/www/us/en/programmable/support/training/course/odsw1164.html