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I must say I have never made a testbench before, the way to test and verify my code works was with doing little tests with modelsim and try and see what happens when I programm the chip.
A testbench is just a simulationmodel, build to verify what your design does, right? Some automated way to check every possibility?
Since I am not familiar with testbenches, I am not sure if I would need them. Because the design has to do what it has to do and I assume the IP blocks are correct. So that means the only thing that needs to be tested is if the blocks are connected in the right way.
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You can never assume anything. You should learn how to do things correctly from the start.
HDL should be written like software (Agile, Test Driven Development). It should work sort of like this;
1. Create a basic design (document, timing diagram, etc)
2. Create your synthesizeable HDL
3. Create your testbench to test the HDL
4. Use code coverage to make sure every logical path through your design is exercised correctly.
5. Integrate into a larger design
6. Synthesize and test in hardware
7. Use an automated build system or continuous integration tool to check that your component always works, eg., if it is a component created from other components, and you change an underlying component, then check that those changes did not break anything.
This requires using testbenches that check themselves, eg., write something to a register, poll until the controller is done, check the results, etc.
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I must really thank you for the advice and options
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You're welcome.
Cheers,
Dave
Honored Contributor
