Generate VHDL code from VHDL code

So ive read and done(some parts of) the tutorial but I didn't quite get how it is all connected to each other or not. I can see 3 different boards and a map called share. I is correct you have to build the quartus or the spoc system only once and after that just change the tcl scripts to change something? But every board has its own tcl scripts, so you would have to write a tcl script for every kind of board you want to use? Or am I not getting the idea of the files at all?

I have been examining example 3 of the thread. As far as I understand the configurations examples, it seems like you would have to use a same kind of component again and again to give the configuration VHDL file any value. So this way I wouldnt be able to change my component C from an SPI ip block to a RAM ip block for example, since than those in and outputs don't make sense anymore. Or is there some way to make this happen too with configurations, or would I have to declare in that file every kind of ip component I want to use?

I'm pretty lost now in this forest of possibilities or non-possibilities.