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Altera_Forum's avatar
Altera_Forum
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12 years ago

Generate VHDL code from VHDL code

Hello, I have been wondering for a while if it is possible to let some standard tool (like quartus, or ISE or maybe even a windows tool) generate a VHDL file from previous written VHDL code. For...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

You can write a top level in VHDL if you want. And SOPC Builder/QSys might be the closest thing to "auto generation" of a top level. But it still needs to know how you want things connected.

But your question is not very clear. Yes you can write a top level in VHDL to instantiate and connect any number of other VHDL modules.