New ContributorHi,
I am using Quartus prime pro 22.4 eval version for AGILEX device. After successful compilation, I want to generate IBIS model (.ibs) file from EDA tool settings. while selecting the EDA tool settings -> board level signal integrity analysis. but option is disabled. please check the attached screen shot. please let us know how to enable the option or any other approach to generate customize IBIS model
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Regards,
Sumanth Raju
Regular ContributorHello Sumanth,
Thank you for reaching out Intel FPGA Community.
You can refer to this link which might be helpful for you:
https://community.intel.com/t5/FPGA-Wiki/Generating-an-Agilex-per-pin-RLC-IBIS-ibs-file/ta-p/1342589
Regards,
Aqid
Regular ContributorAs we do not receive any response from you on the previous question/reply/answer that we have provided, please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
