Forum Discussion
Altera_Forum
Honored Contributor
16 years agoi'm not sure why double clicking the EDA Gate Level Simulation button in the Tasks window only runs Analysis & Synthesis then the EDA Netlist Writer, but to do a gate level timing simulation you will need to run Analysis and Synthesis, Fitter, (optionally a timing analyser), and the EDA Netlist Writer.
even after fitting you can't do a gate level simulation?