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Altera_Forum
Honored Contributor
Honored Contributorgate lev sim not working as expected
hello everybody im quite new in developing for FPGA. I have started wih DE0-nano board. im learning just programming an easy FSM that performs elementary operations. i have followed the tut...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- I do notice that reset is not in the sensitivity list of the 2nd process. But can you post your testbench? Did you provide any timing specifications to the design? --- Quote End --- reset signal is not used. test bench is the following: http://www.alteraforum.com/forum/attachment.php?attachmentid=13078&stc=1
