Functional Sim of PLL broken, Quartus 15.1, Modelsim Starter 10.4b

Trying to functionally simulate PLL. Created the PLL with wizard, instantiated in verilog module.

I have compiled altera_mf.v, cycloneive_atoms.v into work. When vsim is invoked, all models

are found and loaded without error. Simulator is invoked with "-t ps".

I apply a clock to "inclk0_sig" and run for 100ns, then assert areset for 100ns, then deassert.

All outputs of PLL go "X". I also usually get an "iteration limit exceeded" error.

Just need a simple functional sim of the pll at this point. Help anyone?

Regards,

Roger