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Honored Contributor
Honored ContributorFSM: a state gets latched
Hi, i am running a state machine. Simulation shows everything is OK. Real life implementation is showing otherwise. I keep track of the states using on board LEDS showing the current FSM st...
Altera_ForumHonored Contributor
Honored ContributorI do have a testbanch and i did run a simulation.
Didn't see this behavior... Though i didn't spend a lot of time to simulate every possible situation.. My system is driven by en external trigger. At the moment i still havent found a specific sequence that leads to the latch, though i know 3 things for sure: 1. The system can stay forever at WAIT state. No problem there. 2. The system can work great for a couple of sequence and then gets stuck, or gets stuck imidiatly at the first trigger. 3. When in INIT state, the FPGA keeps working, beside the state machine... Really strange... I am open to any sugestion, really anything
