Altera_Forum
Honored Contributor
11 years agoFrozen counter
Hello :D,
I have spent some time trying to get the grip on Verilog by doing some counting, only the output is not quite as expected..Just a frozen on block of leds. If someone would like to check out my Quartus file, and tell me what I did wrong i'd be much obliged. Also why are clock signals other than std logic square waves? I can't seem to figure out why the synthesizer assigns "clocks" to them?