Forum Discussion
Altera_Forum
Honored Contributor
11 years agoFrom opencl Kernel to IO ports or VGA
Hi,
I am working on opencl applications : i am doing some image processing in opencl with DE1SOC board (cyclone V+ARM). I would like to implement physical IO ports of the board directly in opencl kernel. Per example, i would like to send RBG value to the VGA ports from an opencl kernel but i searched in given documentation from Altera website : i found that we can implement streaming interface (ethernet) with channels but i don't know how to implement others physical IO ports of the board. Is it possible to have Memory Mapped peripherals from Qsys design and we communicate to these peripherals from kernel or from the Host (Arm)? After compilation of an opencl kernel (with aoc command), i opened the Quartus project and Qsys project that were generated : i am not able to find the Host (the processor HPS ARM) i find only modules related to the Kernels : a main module called "acl_interface" with Memory Mapped Master. So if even, i add a memory mapped peripheral, i don't know where to connect it. (Normally it should be the HPS Arm processor). Thanks by advance. Ganesh3 Replies
- Altera_Forum
Honored Contributor
Have you had any luck with this? I am using the same board, and attempting to do something similar.
- Altera_Forum
Honored Contributor
Ganesh,
I am also interested in getting start with I/O channels and am using the DE1SOC as well. You mentioned that you found that you can implement Ethernet with channels. Have you done this? I was under the impression that if I viewed the board_spec.xml file, I should see a list of supported I/O interfaces. It doesn't appear to list any, not even ethernet. Would I have to generate my own BSP for I/O support? Thanks, Rudy - Altera_Forum
Honored Contributor
Hi,
I'm also trying to use the channel I / O of this card, but I can not find the "Chan_ID" of the various components, can someone help me?