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Altera_Forum
Honored Contributor
11 years agoFreezing partion layout exactly in Cyclone III (not LS)
Part: EP3C120F484I7 (Cyclone III 120K) Quartus version 9.1SP2 subscription I have a small region, the final output to a high-speed (>200MHz) external DAC, which is apparently sensitive to por...
Altera_Forum
Honored Contributor
11 years ago --- Quote Start --- Put the logic in its own hierarchy, make it a design partition and set it to Post-Fit. When you get a build with good timing, right-click and export the partition as a .qxp. Then add that to your project instead of the source HDL for that hierarchy. (Continue to keep it as a post-fit partition). That was brief, but there should be lots of posts/documentation on partitions. --- Quote End --- Thanks for the sharing. This info is helpful.