FPGA (opencl) code works in emulation (with strict channel depths) but does not work on FPGA (wrong results)

Here is the code (https://drive.google.com/file/d/1QcMYwOPU9onk4CiZx6YFD1pEYjXOSsbY/view?usp=sharing). I am using aoc 17.1 on VLAB Here are the commands that you can run. (You might need to modify t...