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Francesco777's avatar
Francesco777
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5 years ago

FPGA debugging

Hi! I'm relatively new in the world of FPGA programming. I wish to know a way to debug my circuit impleneted in an Altera FPGA. I heard about the following techique: implement the test hardware, the nios 2 processor and a uart. In this way I could communicate via pc to the nios 2 in order to set the inputs to my circuit and evaluate the outputs. Is this a usefull technique to debug my hardware? Where I can find documentations about this procedure? Or there exist a more easy way to debug my circuit in the FPGA?

Thanks in advice for the answer.

4 Replies

    • Francesco777's avatar
      Francesco777
      Icon for New Contributor rankNew Contributor
      5 years ago
      Thanks a lot for your answer. I'm now using in-system sources and probes, because of the possibility to control the inputs of the unit under test... The con is that I need to modify che code to add these sources and probes... there exist some other tool simplier to use that do not require changes in my code? Thanks so much.
      • sstrell's avatar
        sstrell
        Icon for Super Contributor rankSuper Contributor
        5 years ago

        Not sure why you think you need to change code with ISSP other than instantiating the IP (unless you're saying that's the issue itself).

        With Signal Tap, you don't have to change code, but you can't input values with it.

        Can you provide more details on what you want/need?