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New Contributor

5 years ago

FPGA debugging

Hi! I'm relatively new in the world of FPGA programming. I wish to know a way to debug my circuit impleneted in an Altera FPGA. I heard about the following techique: implement the test hardware, the ...

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Super Contributor

5 years ago

There are many built-in tools in Quartus that are simpler for debugging than the setup you've proposed. See the Quartus user guides and the Debug Tools user guide in particular (Lite/Standard or Pro depending on the edition of Quartus you're using). Signal Tap is probably the first thing you'll want to look at:

https://www.intel.com/content/www/us/en/programmable/products/design-software/fpga-design/quartus-prime/user-guides.html

Francesco777
New Contributor
5 years ago
Thanks a lot for your answer. I'm now using in-system sources and probes, because of the possibility to control the inputs of the unit under test... The con is that I need to modify che code to add these sources and probes... there exist some other tool simplier to use that do not require changes in my code? Thanks so much.
- sstrell
  Super Contributor
  5 years ago
  Not sure why you think you need to change code with ISSP other than instantiating the IP (unless you're saying that's the issue itself).
  
  With Signal Tap, you don't have to change code, but you can't input values with it.
  
  Can you provide more details on what you want/need?
  - BoonBengT_Altera
    Moderator
    5 years ago
    Hi @Francesco777,
    
    Thank you for posting in Intel community forum, hope this message find you well and apologies for the delayed in response.
    Based on the situation mention, as mentioned by sstrell, the signalTap/signalProbe seems to be an alternative for your case mention, more details to get you going can be found here.
    Please do let us know if you have any clarification that we can help with.
    
    Warm regards.
    BB