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10 years ago --- Quote Start --- llandis Re: Found pins functioning as undefined clock Without seeing your code or .qar archive, this one sounds like you are using a signal IO pin as a clock input. The FPGA clock pins give you low skew and latency and should be preferred. You can use signal pins that connect to register or memory clock pins but the latency (delay from pin to clock pin inside chip) is much higher and sometimes timing wont work. --- Quote End --- You we're right llandis; I checked the pins again and I am using a dedicated input pin and not an actual clock pin, but even changing the pin to one of the dedicated clock pins I still get the error. I've attached my code below. I'm still yet to refine the timing, I want to get the code correct before playing around with that.
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
ENTITY ClkTest IS
PORT (
clk : IN STD_LOGIC; -- system clock
lcd_enable : IN STD_LOGIC; -- latches data into lcd controller
lcd_bus : IN STD_LOGIC_VECTOR( 9 DOWNTO 0 ); -- data and control signals
busy : OUT STD_LOGIC := '1'; -- lcd controller busy / idle feedback
rs, rw : OUT STD_LOGIC; -- setup/data, and read/write
e1, e2 : OUT STD_LOGIC; -- enable for the lcd
lcd_data : OUT STD_LOGIC_VECTOR( 7 DOWNTO 0 )); -- data signals for the lcd
END ClkTest;
ARCHITECTURE behav OF ClkTest IS
TYPE CONTROL IS( power_up, initialize, ready, send );
SIGNAL state : CONTROL;
CONSTANT freq : INTEGER := 20; -- system clock frequency in MHz
BEGIN
PROCESS( clk )
VARIABLE clk_count : INTEGER := 0; -- event counter for timing
BEGIN
IF RISING_EDGE( clk ) THEN
CASE state IS
-- wait 20 ms to ensure Vcc has risen and required LCD wait is met
WHEN power_up =>
busy <= '1';
IF( clk_count < ( 20000 * freq )) THEN -- wait 20 ms
clk_count := clk_count + 1;
state <= power_up;
ELSE -- power-up complete
clk_count := 0;
rs <= '0';
rw <= '0';
lcd_data <= "00110000"; -- function set command (1)
state <= initialize;
END IF;
-- cycle through initialize sequence
WHEN initialize =>
busy <= '1';
clk_count := clk_count + 1;
IF( clk_count < ( 5000 * freq )) THEN -- wait 5 ms
state <= initialize;
ELSIF( clk_count < ( 5010 * freq )) THEN -- function set command (2)
lcd_data <= "00110000";
e1 <= '1'; e2 <= '1';
state <= initialize;
ELSIF( clk_count < ( 6000 * freq )) THEN -- wait 1 ms
state <= initialize;
e1 <= '0'; e2 <= '0';
ELSIF( clk_count < ( 6010 * freq )) THEN -- function set command (3)
lcd_data <= "00110000";
e1 <= '1'; e2 <= '1';
state <= initialize;
ELSIF( clk_count < ( 7000 * freq )) THEN -- wait 1 ms
state <= initialize;
e1 <= '0'; e2 <= '0';
ELSIF( clk_count < ( 7010 * freq )) THEN -- function set (8-bits, 1 line, 5x7 font)
lcd_data <= "00110000";
e1 <= '1'; e2 <= '1';
state <= initialize;
ELSIF( clk_count < ( 8000 * freq )) THEN -- wait 1 ms
state <= initialize;
e1 <= '0'; e2 <= '0';
ELSIF( clk_count < ( 8010 * freq )) THEN -- display off
lcd_data <= "00001000";
e1 <= '1'; e2 <= '1';
state <= initialize;
ELSIF( clk_count < ( 9000 * freq )) THEN -- wait 1 ms
state <= initialize;
e1 <= '0'; e2 <= '0';
ELSIF( clk_count < ( 9010 * freq )) THEN -- clear display
lcd_data <= "00000001";
e1 <= '1'; e2 <= '1';
state <= initialize;
ELSIF( clk_count < ( 29000 * freq )) THEN -- wait 20 ms
state <= initialize;
e1 <= '0'; e2 <= '0';
ELSIF( clk_count < ( 29010 * freq )) THEN -- entry mode set (increment mode, entire shift off)
lcd_data <= "00000110";
e1 <= '1'; e2 <= '1';
state <= initialize;
ELSIF( clk_count < ( 30000 * freq )) THEN -- wait 1 ms
state <= initialize;
e1 <= '0'; e2 <= '0';
ELSIF( clk_count < ( 30010 * freq )) THEN -- display on (cursor on, blink off)
lcd_data <= "00001110";
e1 <= '1'; e2 <= '1';
state <= initialize;
ELSIF( clk_count < ( 31000 * freq )) THEN
lcd_data <= "00000000";
e1 <= '0'; e2 <= '0';
state <= initialize;
ELSE
clk_count := 0;
busy <= '0';
state <= ready;
END IF;
-- check for busy flag and then latch in the instruction
WHEN ready =>
IF( lcd_enable = '1' ) THEN
busy <= '1';
rs <= lcd_bus(9);
rw <= lcd_bus(8);
lcd_data <= lcd_bus( 7 DOWNTO 0 );
clk_count := 0;
state <= send;
ELSE
busy <= '0';
rs <= '0';
rw <= '0';
lcd_data <= "00000000";
clk_count := 0;
state <= ready;
END IF;
-- send instructions to the lcd
WHEN send =>
busy <= '1';
IF( clk_count < ( 50 * freq )) THEN
busy <= '1';
IF( clk_count < freq ) THEN
e1 <= '0'; e2 <= '0';
ELSIF( clk_count < ( 14 * freq )) THEN
e1 <= '1'; e2 <= '1';
ELSIF( clk_count < ( 27 * freq )) THEN
e1 <= '0'; e2 <= '0';
END IF;
clk_count := clk_count + 1;
state <= send;
ELSE
clk_count := 0;
state <= ready;
END IF;
END CASE;
END IF;
END PROCESS;
END ARCHITECTURE behav;