Force synthesis to fail if RAM cannot be inferred?

I dont know whether you can force synthesis failure if a ram is not infered. But the easiest way to make sure is simply to test your blocks in isolation, not as part of the whole system. If they synthesise to M9Ks on their won then there should be no problems later on.

steps to test:

1. Create a new project with only your "test" module as the top level

2. in assignments editor, assign virtual pins to *

Now it will synthesise your module and hopefully wont take too long.

To avoid problems in the first place - try and follow the templates as close as possible:

1. All addresses should be registered and not read by another process (as this would create a wire that doesnt exist on the hardware)

2. Write data should be registered

In some cases - failure to include a write-enable of some sort can cause failure to infer a ram - if this is the case raise an enhancement request.