Floating Point Logarithm--- HELP

Hello there,

I am a newbie to VHDL and FPGA so please bear with me.

I am doing my final year project on Floating point logarithm and I needed an architecture/algorithm to start me off.

My supervisor said to me it’s a pretty simple project but I am finding it hard and he has asked me to get an architecture for floating point logarithm. I thought it would be addition and multiplication but he said it’s not.

I can’t think of any nor could I find anything on the net neither from any books.

I need you to please help me with a simple architecture on floating point logarithm.

Thank you.

Kind Regards,

Ahmed